(1) Field of the Invention
This invention relates to an external storage device of a computer such as an optical disk data reproducing apparatus, especially to a data reproducing apparatus which reproduces data by conducting erasure correction by use of an error pointer.
(2) Description of the Prior Art
It is absolutely necessary that external storage devices of computers such as a magnetic disk apparatus and an optical disk apparatus have an ability of reproducing recorded data. Namely, extremely high reliability in data reproduction is required for these apparatuses. Generally, therefore, these apparatuses employ a construction in which the recorded data is encoded with an error detection and correction code such as a Reed-Solomon code and then decoded for reproduction, thus protecting the data from various errors caused by defective recording mediums or the like.
If erasure correction is conducted by appointing an error position as an error pointer while the error detection and correction code is decoded, the error correcting capability can be improved. This is described in "Error-Correcting Codes: Second Edition" (pp. 305-307, THE MIT PRES 1972) written by W. Wesley Peterson and E. J. Weldon. The error pointer can be generated, for instance, based on error information obtained while data demodulation and the like.
FIG. 1 is a block diagram of a conventional data reproducing apparatus which conducts erasure correction using an error pointer.
1 refers to an optical disk comprising sectors, each of which stores a data therein, 2 to an optical head formed of a semiconductor laser or the like, 3 to a preamplifier for amplifying a signal read out from the optical disk (will be referred to as a read-out signal, hereinafter), 4 to an equalizer for equalizing a waveform, 5 to a comparator for converting the read-out signal into a binary read-out data 21 in accordance with a reference value, 6 to an address detector for detecting an address recorded in a head of each sector, and 7 to a CPU for totally controlling the apparatus. 8 refers to an envelope detector for detecting that an envelope of the amplified read-out signal is below a specified level and then generating an error pointer 9 refers to an RS detector for detecting resynchronization signals which are recorded in the optical disk 1 at a certain pitch, the resynchronization signals being for compensating for bit slips, 10 to a DM detector for detecting a synchronization signal indicating a leading edge of the data, and 11 to a PLL circuit for reading out a clock from the read-out data 21, the clock being used for demodulation of the read-out data 21. 12 refers to a demodulator for demodulating the read-out data 21 into a demodulated data 22, 13 to a timing gate generator for controlling demodulating timing, and 14 to an error detecting and correcting circuit for decoding an error detection and correction code. 15 is a RAM used to operate the error detecting and correcting circuit 14 and also used as a data buffer. 16 refers to a modulation rule violation detector for detecting a modulation rule violation and then generating an error pointer. A block defined by a dashed line is usually realized as a single circuit block referred to as a demodulating block 18, the block 18 comprising, for example, a one-chip LSI.
The apparatus having the above construction is operated in the following way.
From a signal read out from the optical disk 1, addresses are detected by the address detector 6. When an address 17 of the sector having data to reproduce is detected, the CPU 7 commands the demodulating block 18 and the error detecting and correcting circuit 14 to reproduce the data. Explanation of controlling signals sent from the CPU will be omitted.
As mentioned before, each sector of the optical disk 1 has a synchronization signal and a resynchronization signal recorded therein together with the data itself. The synchronization and the resynchronization signals are detected respectively by the DM detector 10 and the RS detector 9. Referring to these signals, the timing gate generator 13 sends a demodulating gate signal 19 to the demodulator 12 and also sends a demodulating data gate signal 20 to the error detecting and correcting circuit 14.
The demodulator 12 demodulates the read-out data 21 into the demodulated data 22 and sends it to the error detecting and correcting circuit 14, the data 21 being recorded with the (2, 7) RLLC (run length limited code) or another modulation system.
When the envelope detector 8 detects that an envelope of the amplified read-out signal is below a specified level, it sends a drop-out pointer 23 as an error pointer to the error detecting and correcting circuit 14.
The error detecting and correcting circuit 14 also receives a modulation rule violation signal 24 as another error pointer from the modulation rule violation detector 16, which generates the signal 24 when detecting a (2, 7) RLLC modulation rule violation concerning the read-out data 21.
The error detecting and correcting circuit 14 operates error detection and correction including erasure correction by using the RAM 15 as an operating buffer and also by using each error pointer.
As mentioned above, in a conventional data reproducing apparatus, error detection and correction including erasure correction is carried out by detecting a modulation rule violation or a drop-out of an envelope and using it as an error pointer.
According to the above construction, however, error pointers and the demodulated data 22 are all sent through different data lines to the error detecting and correcting circuit 14. If many kinds of error pointers are to be sent, many data lines are necessary, which enlarges the mounting surface area of the printed circuit board. If the demodulating block 18 and the error detecting and correcting circuit 14 are disposed separately for a driver and a controller such as in an ESDI interface, many connecter pins are necessary, which heightens the manufacturing cost.